1. Field
The present invention generally relates to semiconductor design and manufacturing. More specifically, the present invention relates to a method and a system for accurately modeling a manufacturing process which includes sequential steps of photolithography and etching.
2. Related Art
Semiconductor manufacturing technologies typically include a number of processes which involve complex physical and chemical interactions. Since it is almost impossible to find exact formulae to predict the behavior of these complex interactions, developers typically use process models which are fitted to empirical data to predict the behavior of these processes. A semi-empirical process model can be used in a number of applications during the design of a semiconductor chip.
For example, in a technique which is referred to as “Optical Proximity Correction” (OPC), an OPC model is used to make corrections to a semiconductor chip layout (chip layout) to compensate for undesirable optical and resist effects of a photolithography process. Furthermore, OPC models must also account for etch effects that occur due to the structure-etch step and any additional etch steps that follow the photolithography process (i.e., after the photoresist development step). These etch effects are determined by the complex physical, transport, and chemical interactions in an etch chamber. Moreover, the etch effects are heavily influenced by the actual layout of the integrated circuit. For example, different feature sizes in a layout can lead to micro-loading effects and aperture effects. Hence, an accurate OPC model needs to properly describe both the photolithography process and the etch process. In the context of the present invention, an OPC model includes both a photolithography model and an etch model.
Unfortunately, existing OPC models do not compute the combined photolithography-etch effects accurately. One of the inaccuracies of the existing OPC models arises from modeling the non-uniform and non-linear etch bias (hereinafter “etch bias”), defined as a measured difference between a resist contour immediately after the photolithography process and an etch contour immediately after the etch process. This inaccuracy leads to degradation of the overall OPC model quality, especially at the advanced technology nodes where multiple etching techniques have been used to improve printing resolutions.